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Accepted paper at ISVLSI Symposium
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tisseran
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last modified
23.04.2015 03:56 PM
Accepted paper at the IEEE Computer Society Annual Symposium on VLSI (Montpellier, France, July 8-10, 2015)
Title: Small Multiplication-Inversion Unit for Normal Basis Representation in GF(2^m)
Authors: Jérémy Métairie, Arnaud Tisserand and Emmanuel Casseau
Partial funding from the PAVOIS ANR project.
PAVOIS circuits delivered