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Welcome to the homepage of the PAVOIS ANR project (2012-2016).

Arithmetic Protections Against Physical Attacks for Elliptic Curve based Cryptography

Short abstract:

This research will provide novel implementations of curve based cryptographic algorithms on custom hardware platforms. A specific focus will be placed on trade-offs between efficiency and robustness against physical attacks. One of our goal is to theoretically study and practically measure the impact of various protection schemes on the performances (speed, silicon cost and power consumption). The originality of the work lies in new mathematical approaches for optimizing and protecting cryptographic building blocks. Theoretical aspects will include an
investigation of how special number representations can be used to speed-up cryptographic algorithms, and protect cryptographic devices from physical attacks. In particular, we shall explore the suitability and the efficiency of redundant encoding scheme to provide a natural protection against side channel attacks. On the practical side, we will design innovative cryptographic hardware architectures of a specific processor based on the theoretical advancements described above to implement curve based protocols. We will target efficient and secure implementations for both FPGA an ASIC circuits. As a first objective, we plan do develop an FPGA prototype of the processor. Our deliverables will include a fast and secure cryptoprocessor for FPGA that can be used in a variety of cryptographic applications. Specific programming tools will be developed for this processor. Both the processor hardware description for FPGAs and the corresponding programming tools will be distributed as open source. Another original and ambitious goal of the project is the design and fabrication of a specific ASIC version of the processor. Another ambitious objective of our proposal if the extension of our FPGA processor to handle all the arithmetic operations required for implementing the cryptosystems based on hyperelliptic curves.

(see this page for details)

Partners:

• IRISA laboratory, CAIRN research team (Lannion, France)
  
• LIRMM laboratory, DALI (Perpignan, France) and ARITH-ECO / SysMIC (Montpellier, France)

(see this page for details)

Funding:

ANR (the French National Research Agency)

Blanc programme 2012

Label:

Competitivity cluster Images & Réseaux

Contact (project leader):

Dr. Arnaud TISSERAND            CNRS - IRISA - CAIRN

surface mail: CNRS - IRISA, Campus ENSSAT, 6 rue Kerampont, CS 80518, F-22305 LANNION, FRANCE

Tel: (+33) (0)2 96 46 90 27           Email:   arnaud   {dot}   tisserand    {at}   irisa    {dot}   fr           Webpage